this post was submitted on 15 Mar 2024
375 points (97.2% liked)

Technology

59589 readers
2838 users here now

This is a most excellent place for technology news and articles.


Our Rules


  1. Follow the lemmy.world rules.
  2. Only tech related content.
  3. Be excellent to each another!
  4. Mod approved content bots can post up to 10 articles per day.
  5. Threads asking for personal tech support may be deleted.
  6. Politics threads may be removed.
  7. No memes allowed as posts, OK to post as comments.
  8. Only approved bots from the list below, to ask if your bot can be added please contact us.
  9. Check for duplicates before posting, duplicates may be removed

Approved Bots


founded 1 year ago
MODERATORS
you are viewing a single comment's thread
view the rest of the comments
[–] imaqtpie@sh.itjust.works 44 points 8 months ago (1 children)

As far as I know, clock speed is still pretty nice to have, but chip development has shifted towards adding multiple cores because it basically became technologically impossible to continue increasing clock speeds.

[–] themoonisacheese@sh.itjust.works 48 points 8 months ago (1 children)

A nice fun fact: if you consider how fast electricity travels in silicium, it turns out that for a clock that pulses in the tens of billions of times per second (which is what gigahertz are), it is physically impossible for each pulse to get all the way across a 2cm die before the next pulse starts. This is exacerbated by the fact that a processor has many meandering paths throughout and is not a straight line.

So at any given moment, there are several clock cycles traveling throughout a modern processor at the same time, and the designers have to just "come up" with a solution that makes that work, nevermind the fact that almost all the digital logic design tools are not built to account for this, so instead they end up having to use analog (as in audio chips, not as in pen-and-paper design) design tools.

[–] Buddahriffic@lemmy.world 18 points 8 months ago

Signals don't have to make it across the whole die each clock pulse. They just have to make it to the next register in their pipeline/data path, and timing tools for that absolutely exist. They treat it as analog because the signals themselves are analog and chips must account for things like the time it takes for a signal to go from a 0 to a 1 (or vice versa), as well as the time it takes to "charge" a flip flop so that it registers the signal change and holds it stable for the next stage of the pipeline.