We’re excited to share a preview of a Framework Laptop 13 Mainboard with a new CPU architecture today, and it’s probably not the one you think it is. The team at DeepComputing has built the first ever partner-developed Mainboard, and it uses a RISC-V processor! This is a huge milestone both for expanding the breadth of the Framework ecosystem and for making RISC-V more accessible than ever. We designed the Framework Laptop to enable deep flexibility and personalization, and now that extends all the way to processor architecture selection. DeepComputing is demoing an early prototype of this Mainboard in a Framework Laptop 13 at the RISC-V Summit Europe next week, and we’ll be sharing more as this program progresses.
There is excellent philosophical alignment between RISC-V and Framework. Both are built on the idea that an open ecosystem is more powerful than the sum of its parts. To explain why, first we’ll go into what RISC-V even is. RISC-V is a fully open Instruction Set Architecture (ISA), which is the interface point between software and hardware. It’s a defined set of instructions that software is compiled and assembled into that the processor executes to run the actual program. x86 (or the latest version, x86-64) is the most common ISA for PCs today, and it’s what is used in the processors for each Framework Laptop we’ve shipped to date. The x86 ISA was invented by Intel, extended on by AMD, and is proprietary, with Intel and AMD being effectively the only two companies able to use and create processors around it. ARM is another popular ISA, owned by Arm Holdings. Arm licenses the ARM architecture out, which enables companies to pay a license fee for cores to make their own processors that leverage it. What makes RISC-V unique is that it is an entirely open architecture, which means that anyone can extend on it and create their own processors that use it without paying a fee. RISC-V International is the collaborative organization that exists to help develop the standard and define common versions to ensure cross-compatibility of hardware and software. There are hundreds of companies now developing cores and chips around RISC-V, but most of these have been hidden away in embedded applications. The DeepComputing RISC-V Mainboard is one of the first instances of leveraging this ecosystem for the main processor in a consumer-facing product.
All of this is what makes RISC-V unique from an ecosystem enablement perspective. The actual technology is equally interesting. The base instruction set of RISC-V is simple and streamlined, while there are a number of extensions enabling high performance and specialized compute. This means that RISC-V cores can be developed for anything from tiny control CPUs embedded inside a sensor (the Fingerprint Reader we’ve used in Framework Laptops since 2021 actually has a RISC-V core!) to monstrous multi-hundred-core server processors. The DeepComputing RISC-V Mainboard uses a JH7110 processor from StarFive which has four U74 RISC-V cores from SiFive. SiFive is the company that developed CPU cores using the RISC-V ISA, StarFive is the processor designer that integrated those CPU cores with other peripherals, DeepComputing created a Mainboard leveraging that processor, and Framework makes laptops that can use the Mainboard. The power of an open ecosystem!
This Mainboard is extremely compelling, but we want to be clear that in this generation, it is focused primarily on enabling developers, tinkerers, and hobbyists to start testing and creating on RISC-V. The peripheral set and performance aren’t yet competitive with our Intel and AMD-powered Framework Laptop Mainboards. This board also has soldered memory and uses MicroSD cards and eMMC for storage, both of which are limitations of the processor. It is a great way to start playing with RISC-V though inside of a thin, light, refined laptop. The Mainboard will be able to drop into any Framework Laptop 13 chassis or into the Cooler Master Mainboard Case. DeepComputing is also working closely with the teams at Canonical and Red Hat to ensure Linux support is solid through Ubuntu and Fedora. We’ll continue to keep you up to date as we work with the team at DeepComputing to complete development of this new Mainboard and enable access to it. You can sign up in the Framework Marketplace to get notified when we have updates.
We have a couple of other updates around scaling access to Framework Laptop 13. The first is that just like we did for Framework Laptop 16 last week, today we’re sharing open source CAD for the Framework Laptop 13 shell, enabling development of skins, cases, and accessories. The second is that we now have Framework Laptop 13 Factory Seconds systems available with British English and German keyboards, making entering the ecosystem more affordable than ever. We’re eager to continue growing a new Consumer Electronics industry that is grounded in open access, repairability, and customization at every level.
this post was submitted on 18 Jun 2024
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!!!! And they're SiFive cores!!! This is awesome.
Kinda slow though. I saw a benchmark of an SBC with that SoC on Phoronix and it was half as fast as a Pi 4.
This is true. However, the things that has me excited is that, since they are SiFive cores, they should be fully compliant with the RISC-V spec (as of the HW implementation). Other recent Linux-capable RISC-V chips, such as the T-Head C910 have been non-compliant, either due to being released before extension acceptance (Vector extension want at 1.0 before they shipped the design) or hardware design bug (floating point module does not raise underflow exceptions, causing violation of IEEE754, and non-compliance with the RISC-V spec). Issues like these have caused them to be blocked for mainline kernel support (implementing support for non-compliant chips breaks support for compliant chips or requires support of a "sub-arch").
Nonetheless, I hope this does well and helps drive improved support for newer and faster RV64 chips.