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"Ousted" Intel CEO Steps In To Defend The Firm's 18A Process, Says Yield Rate % Isn't The Right Metric To Measure Semiconductor Progress (wccftech.com)

submitted 11 months ago by floofloof@lemmy.ca to c/technology@lemmy.world

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[–] just_another_person@lemmy.world 49 points 11 months ago

Well, he's not technically wrong. You need the actual production metrics to say if he's full of shit though.

[–] ryannathans@aussie.zone 25 points 11 months ago

Tldr it should be yield rate per area

[–] halcyoncmdr@lemmy.world 21 points 11 months ago

It's not the right measure for progress. It's the right measure for viability. If yield is terrible, the end product may cost too much to market.

[+] dinckelman@lemmy.world 21 points 11 months ago* (last edited 1 month ago) (4 children)

[deleted]

[–] aaaa@lemmy.world 21 points 11 months ago

Gelsinger was hired as a known long time engineer, rather than as a business expert. I would trust his numbers from an engineering perspective, even though I was laid off under his rule

[–] wewbull@feddit.uk 13 points 11 months ago

All depends on the maturity of the process. 10% for a new design on a bleeding edge process is possibly viable. You'll then tweak the design and process to get the yield up.

[–] orclev@lemmy.world 11 points 11 months ago (1 children)

Only exception would be if they can produce those wafers at 1/10th of the previous cost, but I highly doubt that's the case.

[–] iopq@lemmy.world 2 points 11 months ago

If it's 1/10 of the cost of purchasing them from TSMC, it's viable

[–] GorgeousWalrus@feddit.org 9 points 11 months ago

Yield over die area should be the metric.

If you have a chip that is 50% of the wafer area, a single fault will lead to a yield of 50%. Now compare it with a chip that is 1% of the wafer area, the same single fault gets a yield of 99%.

So comparing the yields of two processes without factoring in the die area is not a fair game.

[–] Brkdncr@lemmy.world 6 points 11 months ago

Gelsinger replied to a post by a prominent analyst, Patrick Moorhead, where it was initially claimed that Intel's 18A wasn't tested on a PDK 1.0 but rather an older design kit, which is why the yield rate figures are reported so low.